An Implementation of Parasitic Insensitive 128 x100 Pixels Fingerprint Sensor using Modified Switched Capacitor Integrator

This paper proposes 128x100 array fingerprint sensor with the modified parasitic insensitive switched capacitor integrator. The modified parasitic insensitive switched capacitor integrator includes four switches to eliminate parasitic capacitance and transfer a generated charge. The proposed circuit also frees from the influence of skin resistivity, because the effect of the voltage drop through skin resistor is very small. The scheme of one pixel includes a pixel level charge transfer and also parasitic insensitive switched capacitor integrator with a differential amplifier. The proper operation is validated by HSPICE for onepixel and RTL simulation including logic synthesis for a full chip design on condition of 0.35μm typical CMOS process and 3.3V power. The layout is performed by full custom flow for one-pixel and auto P&R for a full chip. The area of a full chip is 8721 μm x 6921 μm and the gate count is 1,140,553. The area of one-pixel is 58 x 58 μm 2 . Pitch is 60 μm and image resolution is 423dpi.